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MC68HC08AZ0 Datasheet, PDF (312/444 Pages) Motorola, Inc – Advance Information
Freescale Semiconductor, Inc.
Analog-to-Digital Converter (ADC)
ADC port I/O pins
PTB7/ATD7–PTB0/ATD0 are general purpose I/O pins that share with
the ADC channels.
The Channel select bits define which ADC channel/port pin will be used
as the input signal. The ADC overrides the port I/O logic by forcing that
pin as input to the ADC. The remaining ADC channels/port pins are
controlled by the port I/O logic and can be used as general purpose I/O.
Writes to the port register or DDR will not have any affect on the port pin
that is selected by the ADC. Read of a port pin which is in use by the
ADC will return a logic zero.
Voltage
conversion
When the input voltage to the ADC equals to VREFH, the ADC converts
the signal to $FF (full scale). If the input voltage equals to AVSS/VREFL,
the ADC converts it to $00. Input voltages between VREFH and
AVSS/VREFL is a straight-line linear conversion. Conversion accuracy of
all other input voltages is not guaranteed. Current injection on unused
pins can also cause conversion inaccuracies.
NOTE: Input voltage should not exceed the analog supply voltages.
Conversion time
Conversion starts after a write to the ADSCR. Conversion time in terms
of the number of bus cycles is a function of oscillator frequency, bus
frequency, and ADIV prescaler bits. For example, with oscillator
frequency of 4MHz, bus frequency of 8MHz and ADC clock frequency of
1MHz, one conversion will take between 16 ADC and 17 ADC clock
cycles or between 16 and 17 µs in this case. There will be 128 bus cycles
between each conversion. Sample rate is approximately 60kHz.
Conversion time = 16–17 ADC cycles
ADC frequency
# Bus cycles = Conversion time x Bus frequency
MC68HC08AZ0
310
Analog-to-Digital Converter (ADC)
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