MC68HC08AZ0 Datasheet, PDF (406/444 Pages) Motorola, Inc – Advance Information

SpeciÞcations
Freescale Semiconductor, Inc.
SS
INPUT
SS PIN OF MASTER HELD HIGH
SCK
(CPOL = 0)
OUTPUT
NOTE
1
5
4
SCK
(CPOL = 1)
OUTPUT
NOTE
5
4
12
12
MISO
INPUT
10 (REF)
MOSI
OUTPUT
13
MSB IN
11
MASTER MSB OUT
BIT 6–1
10
BIT 6–1
NOTE: This first clock edge is generated internally, but is not seen at the SCK pin.
a) SPI Master Timing (CPHA = 0)
13
12
13
6
7
LSB IN
11 (REF)
MASTER LSB OUT
12
SS
INPUT
SS PIN OF MASTER HELD HIGH
1
13
SCK (CPOL = 0)
5
OUTPUT
4
12
SCK (CPOL = 1)
5
OUTPUT
4
MISO
INPUT
10 (REF)
MOSI
OUTPUT
13
MSB IN
11
MASTER MSB OUT
BIT 6–1
10
BIT 6–1
12
NOTE
13
NOTE
6
7
LSB IN
11
MASTER LSB OUT
12
NOTE: This last clock edge is generated internally, but is not seen at the SCK pin.
b) SPI Master Timing (CPHA = 1)
Figure 1. SPI Master Timing Diagram
MC68HC08AZ0
404
Specifications
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MOTOROLA