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MC68HC08AZ0 Datasheet, PDF (300/444 Pages) Motorola, Inc – Advance Information
Freescale Semiconductor, Inc.
Timer Interface Module B (TIMB)
TIMB channel
registers (TBCH0H/
LÐTBCH3H/L)
These read/write registers contain the captured TIMB counter value of
the input capture function or the output compare value of the output
compare function. The state of the TIMB channel registers after reset is
unknown.
In input capture mode (MSxB:MSxA = 0:0), reading the high byte of the
TIMB channel x registers (TBCHxH) inhibits input captures until the low
byte (TBCHxL) is read.
In output compare mode (MSxB:MSxA ≠ 0:0), writing to the high byte of
the TIMB channel x registers (TBCHxH) inhibits output compares until
the low byte (TBCHxL) is written.
Bit 7
6
TBCH0H Read:
$0046 Write:
Bit 15
14
Reset:
Bit 7
6
TBCH0L Read:
$0047 Write:
Bit 7
6
Reset:
Bit 7
6
TBCH1H Read:
$0049 Write:
Bit 15
14
Reset:
Bit 7
6
TBCH1L Read:
$004A Write:
Bit 7
6
Reset:
5
4
3
2
13
12
11
10
Indeterminate after reset
5
4
3
2
5
4
3
2
Indeterminate after reset
5
4
3
2
13
12
11
10
Indeterminate after reset
5
4
3
2
5
4
3
2
Indeterminate after reset
1
Bit 0
9
Bit 8
1
Bit 0
1
Bit 0
1
Bit 0
9
Bit 8
1
Bit 0
1
Bit 0
Figure 16. TIMB channel registers (TBCH0H/L–TBCH1H/L)
MC68HC08AZ0
298
Timer Interface Module B (TIMB)
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Go to: www.freescale.com
22-timb
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