MC68HC08AZ0 Datasheet, PDF (285/444 Pages) Motorola, Inc – Advance Information

Freescale Semiconductor, Inc.
Timer Interface Module B (TIMB)
Functional description
As Figure 10 shows, the output compare value in the TIMB channel
registers determines the pulse width of the PWM signal. The time
between overflow and output compare is the pulse width. Program the
TIMB to clear the channel pin on output compare if the state of the PWM
pulse is logic one. Program the TIMB to set the pin if the state of the
PWM pulse is logic zero.
OVERFLOW
OVERFLOW
PERIOD
OVERFLOW
PTFx/TBCHx
PULSE
WIDTH
OUTPUT
COMPARE
OUTPUT
COMPARE
Figure 10. PWM period and pulse width
OUTPUT
COMPARE
The value in the TIMB counter modulo registers and the selected
prescaler output determines the frequency of the PWM output. The
frequency of an 8-bit PWM signal is variable in 256 increments. Writing
$00FF (255) to the TIMB counter modulo registers produces a PWM
period of 256 times the internal bus clock period if the prescaler select
value is 000. See TIMB status and control register (TBSC) on page 290.
The value in the TIMB channel registers determines the pulse width of
the PWM output. The pulse width of an 8-bit PWM signal is variable in
256 increments. Writing $0080 (128) to the TIMB channel registers
produces a duty cycle of 128/256 or 50%.
7-timb
MOTOROLA
Timer Interface Module B (TIMB)
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MC68HC08AZ0
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