MC68HC08AZ0 Datasheet, PDF (54/444 Pages) Motorola, Inc – Advance Information

Freescale Semiconductor, Inc.
EBI
EBI Chip-Select
Register
Bit 7
6
5
4
3
2
1
Bit 0
EBICS
$003C
Read:
CS1WS1 CS1WS0 CS1POL
Write:
CS1EN
CS0WS1 CS0WS0 CS0POL
CS0EN
Reset
:
1
1
0
1
1
1
0
1
= Unimplemented
Figure 12 EBI control register (EBICS)
CS1WS1:0
These bits control the number of WAIT States for Chip-Select 1 during
external accesses when the WAIT states are internally controlled.
WAIT states are inserted according to Table 6
CS1WS1:0
Number of WAIT States
00
0
01
1
10
2
11
3
Table 6 WAIT states for external accesses
CS1EN — Chip-select enable
This bit controls whether the Chip-Select is active.
0 = Chip-Select disabled.
1 = Chip-Select enabled
CS1POL — Chip-select polarity
This bit controls the polarity of the Chip-Select line.
0 = Chip-Select Active LOW
1 = Chip-Select Active HIGH
MC68HC08AZ0
52
EBI
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16-ebi
MOTOROLA