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M1AFS600-PQ208 Datasheet, PDF (66/334 Pages) Microsemi Corporation – Fusion Family of Mixed Signal FPGAs | |||
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Device Architecture
Read Operation
Read operations are designed to read data from the FB Array, Page Buffer, Block Buffer, or status
registers. Read operations support a normal read and a read-ahead mode (done by asserting
READNEXT). Also, the timing for Read operations is dependent on the setting of PIPE.
The following diagrams illustrate representative timing for Non-Pipe Mode (Figure 2-38) and Pipe Mode
(Figure 2-39) reads of the flash memory block interface.
CLK
REN
ADDR[17:0]
A0
A1
A2 A3
DATAWIDTH[1:0]
BUSY
STATUS[1:0]
0
S0 S1 S2 S3
RD[31:0]
0
D0 D1 D2 D3
Figure 2-38 ⢠Read Waveform (Non-Pipe Mode, 32-bit access)
A4
0
S4
0
D4
0
CLK
REN
ADDR[17:0]
A0
A1
A2 A3
DATAWIDTH[1:0]
BUSY
STATUS[1:0]
0
S0 S1 S2 S3
RD[31:0]
0
D0 D1 D2 D3
Figure 2-39 ⢠Read Waveform (Pipe Mode, 32-bit access)
A4
0
S4
0
X D4 0
2-50
Revision 4
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