M1AFS600-PQ208 Datasheet, PDF (328/334 Pages) Microsemi Corporation – Fusion Family of Mixed Signal FPGAs

Datasheet Information
Revision
Advance v0.8
(continued)
Changes
Page
This sentence was updated in the "No-Glitch MUX (NGMUX)" section to delete GLA:
The GLMUXCFG[1:0] configuration bits determine the source of the CLK inputs (i.e.,
internal signal or GLC).
2-32
In Table 2-13 • NGMUX Configuration and Selection Table, 10 and 11 were deleted. 2-32
The method to enable sleep mode was updated for bit 0 in Table 2-16 • RTC
Control/Status Register.
2-38
S2 was changed to D2 in Figure 2-39 • Read Waveform (Pipe Mode, 32-bit access)
for RD[31:0] was updated.
2-51
The definitions for bits 2 and 3 were updated in Table 2-24 • Page Status Bit
Definition.
2-52
Figure 2-46 • FlashROM Timing Diagram was updated.
2-58
Table 2-26 • FlashROM Access Time is new.
2-58
Figure 2-55 • Write Access After Write onto Same Address, Figure 2-56 • Read
Access After Write onto Same Address, and Figure 2-57 • Write Access After Read
onto Same Address are new.
2-68–
2-70
Table 2-31 • RAM4K9 and Table 2-32 • RAM512X18 were updated.
2-71, 2-72
The VAREF and SAMPLE functions were updated in Table 2-36 • Analog Block Pin 2-82
Description.
The title of Figure 2-72 • Timing Diagram for Current Monitor Strobe was updated to 2-91
add the word "positive."
The "Gate Driver" section was updated to give information about the switching rate 2-94
in High Current Drive mode.
The "ADC Description" section was updated to include information about the
SAMPLE and BUSY signals and the maximum frequencies for SYSCLK and
ADCCLK. EQ 2 was updated to add parentheses around the entire expression in the
denominator.
2-102
Table 2-46 · Analog Channel Specifications and Table 2-47 · ADC Characteristics in 2-118,
Direct Input Mode were updated.
2-121
The note was removed from Table 2-55 • Analog Multiplexer Truth Table—AV (x = 0), 2-131
AC (x = 1), and AT (x = 3).
Table 2-63 • Internal Temperature Monitor Control Truth Table is new.
2-132
The "Cold-Sparing Support" section was updated to add information about cases 2-143
where current draw can occur.
Figure 2-104 • Solution 4 was updated.
2-147
Table 2-75 • Fusion Standard I/O Standards—OUT_DRIVE Settings was updated.
2-153
The "GNDA Ground (analog)" section and "GNDAQ Ground (analog quiet)" section 2-224
were updated to add information about maximum differential voltage.
The "V_AREF Analog Reference Voltage" section and "VPUMP Programming Supply 2-226
Voltage" section were updated.
The "V_CCPLA/B PLL Supply Voltage" section was updated to include information 2-225
about the east and west PLLs.
The V_COMPLF pin description was deleted.
The "Axy Analog Input/Output" section was updated with information about
grounding and floating the pin.
N/A
2-226
5-12
Revision 4