M1AFS600-PQ208 Datasheet, PDF (190/334 Pages) Microsemi Corporation – Fusion Family of Mixed Signal FPGAs

Device Architecture
Table 2-96 • I/O Output Buffer Maximum Resistances ¹ (continued)
Standard
Drive Strength
R_{P(oUhLLm-DsO) W2 N}
R(o_{PhUmLLs-U) 3P}
Applicable to Standard I/O Banks
3.3 V LVTTL / 3.3 V LVCMOS
2 mA
100
300
4 mA
100
300
6 mA
50
150
8 mA
50
150
2.5 V LVCMOS
2 mA
100
200
4 mA
100
200
6 mA
50
100
8 mA
50
100
1.8 V LVCMOS
2 mA
200
225
4 mA
100
112
1.5 V LVCMOS
2 mA
200
224
Notes:
1. These maximum values are provided for informational reasons only. Minimum output buffer resistance values depend
on VCC, drive strength selection, temperature, and process. For board design considerations and detailed output buffer
resistances, use the corresponding IBIS models located on the Microsemi SoC Products Group website:
http://www.microsemi.com/soc/techdocs/models/ibis.html.
2. R_{(PULL-DOWN-MAX)} = VOLspec / I_OLspec
3. R_{(PULL-UP-MAX)} = (VCCImax – VOHspec) / IOHspec
Table 2-97 • I/O Weak Pull-Up/Pull-Down Resistances
Minimum and Maximum Weak Pull-Up/Pull-Down Resistance Values
R_(WEAK
1
PULL-UP)
(ohms)
R_(WEAK
2
PULL-DOWN)
(ohms)
VCCI
Min.
Max.
Min.
Max.
3.3 V
10 k
45 k
10 k
45 k
2.5 V
11 k
55 k
12 k
74 k
1.8 V
18 k
70 k
17 k
110 k
1.5 V
19 k
90 k
19 k
140 k
Notes:
1. R_{(WEAK PULL-UP-MAX)} = (VCCImax – VOHspec) / I_{WEAK PULL-UP-MIN}
2. R_{(WEAK PULL-DOWN-MAX)} = VOLspec / I_{WEAK PULL-DOWN-MIN}
2-174
Revision 4