M1AFS600-PQ208 Datasheet, PDF (21/334 Pages) Microsemi Corporation – Fusion Family of Mixed Signal FPGAs

Fusion Family of Mixed Signal FPGAs
Timing Characteristics
Table 2-1 • Combinatorial Cell Propagation Delays
Commercial Temperature Range Conditions: T_J = 70°C, Worst-Case VCC = 1.425 V
Combinatorial Cell
Equation
Parameter
–2
–1
Std.
Units
INV
Y = !A
t_PD
0.40
0.46
0.54
ns
AND2
Y=A·B
t_PD
0.47
0.54
0.63
ns
NAND2
Y = !(A · B)
t_PD
0.47
0.54
0.63
ns
OR2
Y=A+B
t_PD
0.49
0.55
0.65
ns
NOR2
Y = !(A + B)
t_PD
0.49
0.55
0.65
ns
XOR2
Y = A B
t_PD
0.74
0.84
0.99
ns
MAJ3
Y = MAJ(A, B, C)
t_PD
0.70
0.79
0.93
ns
XOR3
Y = A  B C
t_PD
0.87
1.00
1.17
ns
MUX2
Y = A !S + B S
t_PD
0.51
0.58
0.68
ns
AND3
Y=A·B·C
t_PD
0.56
0.64
0.75
ns
Note: For the derating values at specific junction temperature and voltage supply levels, refer to Table 3-7 on
page 3-9.
Sample VersaTile Specifications—Sequential Module
The Fusion library offers a wide variety of sequential cells, including flip-flops and latches. Each has a
data input and optional enable, clear, or preset. In this section, timing characteristics are presented for a
representative sample from the library (Figure 2-5). For more details, refer to the IGLOO, ProASIC3,
SmartFusion and Fusion Macro Library Guide.
Revision 4
2-5