M1AFS600-PQ208 Datasheet, PDF (219/334 Pages) Microsemi Corporation – Fusion Family of Mixed Signal FPGAs

Fusion Family of Mixed Signal FPGAs
2.5 V GTL
Gunning Transceiver Logic is a high-speed bus standard (JESD8-3). It provides a differential amplifier
input buffer and an open-drain output buffer. The VCCI pin should be connected to 2.5 V.
Table 2-141 • Minimum and Maximum DC Input and Output Levels
2.5 GTL
VIL
VIH
VOL VOH
IOL IOH IOSL IOSH IIL¹ IIH²
Drive
Strength
20 mA³
Min.
V
–0.3
Max.
V
Min.
V
VREF – 0.05 VREF + 0.05
Max.
V
3.6
Max.
V
0.4
Min.
V
–
mA mA
20 20
Max.
mA³
124
Max.
mA³ µA⁴ µA⁴
169 10 10
Notes:
1. IIL is the input leakage current per I/O pin over recommended operation conditions where –0.3 V < VIN < VIL.
2. IIH is the input leakage current per I/O pin over recommended operating conditions VIH < VIN < VCCI. Input current is
larger when operating outside recommended ranges.
3. Currents are measured at high temperature (100°C junction temperature) and maximum voltage.
4. Currents are measured at 85°C junction temperature.
VTT
GTL
25
Test Point
10 pF
Figure 2-125 • AC Loading
Table 2-142 • AC Waveforms, Measuring Points, and Capacitive Loads
Input Low (V) Input High (V)
Measuring Point* (V) VREF (typ.) (V) VTT (typ.) (V)
VREF – 0.05
VREF + 0.05
0.8
0.8
1.2
Note: *Measuring point = Vtrip. See Table 2-90 on page 2-169 for a complete table of trip points.
C_LOAD (pF)
10
Timing Characteristics
Table 2-143 • 2.5 V GTL
Commercial Temperature Range Conditions: TJ = 70°C, Worst-Case VCC = 1.425 V,
Worst-Case VCCI = 3.0 V, VREF = 0.8 V
Speed
Grade t_DOUT
t_DP
t_DIN
t_PY
t_EOUT
t_ZL
t_ZH
t_LZ
t_HZ
t_ZLS t_ZHS
Std.
0.66
2.13 0.04 2.46 0.43 2.16 2.13
4.40 4.36
Units
ns
–1
0.56
1.81 0.04 2.09 0.36 1.84 1.81
3.74 3.71 ns
–2
0.49
1.59 0.03 1.83 0.32 1.61 1.59
3.28 3.26 ns
Note: For the derating values at specific junction temperature and voltage supply levels, refer to Table 3-7 on
page 3-9.
Revision 4
2- 203