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M1AFS600-PQ208 Datasheet, PDF (218/334 Pages) Microsemi Corporation – Fusion Family of Mixed Signal FPGAs
Device Architecture
Voltage Referenced I/O Characteristics
3.3 V GTL
Gunning Transceiver Logic is a high-speed bus standard (JESD8-3). It provides a differential amplifier
input buffer and an open-drain output buffer. The VCCI pin should be connected to 3.3 V.
Table 2-138 • Minimum and Maximum DC Input and Output Levels
3.3 V GTL
VIL
VIH
VOL VOH IOL IOH IOSL IOSH IIL1 IIH2
Drive
Strength
20 mA3
Min.
V
Max.
V
Min.
V
–0.3 VREF – 0.05 VREF + 0.05
Max.
V
3.6
Max.
V
0.4
Min.
V
–
Max.
mA mA mA3
20 20 181
Max.
mA3 µA4 µA4
268 10 10
Notes:
1. IIL is the input leakage current per I/O pin over recommended operation conditions where –0.3 V < VIN < VIL.
2. IIH is the input leakage current per I/O pin over recommended operating conditions VIH < VIN < VCCI. Input current is
larger when operating outside recommended ranges.
3. Currents are measured at high temperature (100°C junction temperature) and maximum voltage.
4. Currents are measured at 85°C junction temperature.
VTT
GTL
25
Test Point
10 pF
Figure 2-124 • AC Loading
Table 2-139 • AC Waveforms, Measuring Points, and Capacitive Loads
Input Low (V)
Input High (V) Measuring Point* (V) VREF (typ.) (V) VTT (typ.) (V)
VREF – 0.05
VREF + 0.05
0.8
0.8
1.2
Note: *Measuring point = Vtrip. See Table 2-90 on page 2-169 for a complete table of trip points.
CLOAD (pF)
10
Timing Characteristics
Table 2-140 • 3.3 V GTL
Commercial Temperature Range Conditions: TJ = 70°C, Worst-Case VCC = 1.425 V,
Worst-Case VCCI = 3.0 V, VREF = 0.8 V
Speed
Grade
Std.
tDOUT
tDP
tDIN
tPY
tEOUT
tZL
tZH
tLZ
tHZ
tZLS tZHS Units
0.66 2.08 0.04 2.93 0.43 2.04 2.08
4.27 4.31 ns
–1
0.56 1.77 0.04 2.50 0.36 1.73 1.77
3.63 3.67 ns
–2
0.49 1.55 0.03 2.19 0.32 1.52 1.55
3.19 3.22 ns
Note: For the derating values at specific junction temperature and voltage supply levels, refer to Table 3-7 on
page 3-9.
2-202
Revision 4