M1AFS600-PQ208 Datasheet, PDF (186/334 Pages) Microsemi Corporation – Fusion Family of Mixed Signal FPGAs

Device Architecture
Table 2-92 • Summary of I/O Timing Characteristics – Software Default Settings
Commercial Temperature Range Conditions: T_J = 70°C, Worst-Case VCC = 1.425 V,
Worst-Case VCCI = I/O Standard Dependent
Applicable to Pro I/Os
I/O Standard
3.3 V LVTTL/ 12 mA High 35 – 0.49 2.74 0.03 0.90 1.17 0.32 2.79 2.14 2.45 2.70 4.46 3.81 ns
3.3 V LVCMOS
2.5 V LVCMOS 12 mA High 35 – 0.49 2.80 0.03 1.13 1.24 0.32 2.85 2.61 2.51 2.61 4.52 4.28 ns
1.8 V LVCMOS 12 mA High 35 – 0.49 2.83 0.03 1.08 1.42 0.32 2.89 2.31 2.79 3.16 4.56 3.98 ns
1.5 V LVCMOS 12 mA High 35 – 0.49 3.30 0.03 1.27 1.60 0.32 3.36 2.70 2.96 3.27 5.03 4.37 ns
3.3 V PCI
Per
PCI
spec
High 10 25 ² 0.49 2.09 0.03 0.78 1.25 0.32 2.13 1.49 2.45 2.70 3.80 3.16 ns
3.3 V PCI-X
Per High 10 25 ² 0.49 2.09 0.03 0.77 1.17 0.32 2.13 1.49 2.45 2.70 3.80 3.16 ns
PCI-X
spec
3.3 V GTL
20 mA High 10 25 0.49 1.55 0.03 2.19 – 0.32 1.52 1.55 0.00 0.00 3.19 3.22 ns
2.5 V GTL
20 mA High 10 25 0.49 1.59 0.03 1.83 – 0.32 1.61 1.59 0.00 0.00 3.28 3.26 ns
3.3 V GTL+ 35 mA High 10 25 0.49 1.53 0.03 1.19 – 0.32 1.56 1.53 0.00 0.00 3.23 3.20 ns
2.5 V GTL+ 33 mA High 10 25 0.49 1.65 0.03 1.13 – 0.32 1.68 1.57 0.00 0.00 3.35 3.24 ns
HSTL (I)
8 mA High 20 50 0.49 2.37 0.03 1.59 – 0.32 2.42 2.35 0.00 0.00 4.09 4.02 ns
HSTL (II)
15 mA High 20 25 0.49 2.26 0.03 1.59 – 0.32 2.30 2.03 0.00 0.00 3.97 3.70 ns
SSTL2 (I)
17 mA High 30 50 0.49 1.59 0.03 1.00 – 0.32 1.62 1.38 0.00 0.00 3.29 3.05 ns
SSTL2 (II)
21 mA High 30 25 0.49 1.62 0.03 1.00 – 0.32 1.65 1.32 0.00 0.00 3.32 2.99 ns
SSTL3 (I)
16 mA High 30 50 0.49 1.72 0.03 0.93 – 0.32 1.75 1.37 0.00 0.00 3.42 3.04 ns
SSTL3 (II)
24 mA High 30 25 0.49 1.54 0.03 0.93 – 0.32 1.57 1.25 0.00 0.00 3.24 2.92 ns
LVDS
24 mA High – – 0.49 1.57 0.03 1.36 – – – – – – – – ns
LVPECL
24 mA High – – 0.49 1.60 0.03 1.22 – – – – – – – – ns
Notes:
1. For specific junction temperature and voltage-supply levels, refer to Table 3-6 on page 3-7 for derating values.
2. Resistance is used to measure I/O propagation delays as defined in PCI specifications. See Figure 2-123 on page 2-200
for connectivity. This resistor is not required during normal operation.
2-170
Revision 4