M1AFS600-PQ208 Datasheet, PDF (216/334 Pages) Microsemi Corporation – Fusion Family of Mixed Signal FPGAs

Device Architecture
3.3 V PCI, 3.3 V PCI-X
The Peripheral Component Interface for 3.3 V standard specifies support for 33 MHz and 66 MHz PCI
Bus applications.
Table 2-134 • Minimum and Maximum DC Input and Output Levels
3.3 V PCI/PCI-X
VIL
VIH
VOL VOH
IOL IOH IOSL IOSH IIL¹ IIH²
Drive Strength
Min.
V
Max.
V
Min.
V
Max.
V
Max.
V
Min.
V
Max. Max.
mA mA mA³ mA³ µA⁴ µA⁴
Per PCI
specification
Per PCI curves
10 10
Notes:
1. IIL is the input leakage current per I/O pin over recommended operation conditions where –0.3 V < VIN < VIL.
2. IIH is the input leakage current per I/O pin over recommended operating conditions VIH < VIN < VCCI. Input current is
larger when operating outside recommended ranges.
3. Currents are measured at high temperature (100°C junction temperature) and maximum voltage.
4. Currents are measured at 85°C junction temperature.
AC loadings are defined per the PCI/PCI-X specifications for the datapath; Microsemi loadings for enable
path characterization are described in Figure 2-123.
R = 25
Test Point
Data Path
R to VCCI for t_DP (F)
R to GND for t_DP (R)
R=1k
Test Point
Enable Path
R to VCCI for t_LZ / t_ZL / t_ZLS
R to GND for t_HZ / t_ZH / t_ZHS
10 pF for t_ZH / t_ZHS / t_ZL / t_ZLS
10 pF for t_HZ / t_LZ
Figure 2-123 • AC Loading
AC loadings are defined per PCI/PCI-X specifications for the data path; Microsemi loading for tristate is
described in Table 2-135.
Table 2-135 • AC Waveforms, Measuring Points, and Capacitive Loads
Input Low (V)
Input High (V)
Measuring Point* (V)
VREF (typ.) (V)
0
Note:
3.3
0.285 * VCCI for t_DP(R)
–
0.615 * VCCI for t_DP(F)
*Measuring point = Vtrip. See Table 2-90 on page 2-169 for a complete table of trip points.
C_LOAD (pF)
10
2-200
Revision 4