M1AFS600-PQ208 Datasheet, PDF (22/334 Pages) Microsemi Corporation – Fusion Family of Mixed Signal FPGAs

Device Architecture
Data
D
Out
Q
DFN1
CLK
Data
D
Out
Q
En _DFN1E1
CLK
PRE
Data _D
Q ^Out
DFN1C1
CLK
CLR
Figure 2-5 • Sample of Sequential Cells
Data
D
Out
Q
En _DFI1E1P1
CLK
CLK
Data
50%
50%
50%
t_HD
t_SUD
50%
0
50%
50%
t_CKMPWH t_CKMPWL
50%
50% 50%
EN
PRE
CLR
Out
50%
t_HE
t_SUE
t_WPRE
t_RECPRE
50%
50%
t_WCLR
50%
t_RECCLR
50%
t_CLKQ
t_PRE2Q
50% 50%
t_CLR2Q
50%
Figure 2-6 • Sequential Timing Model and Waveforms
t_REMPRE
50%
t_REMCLR
50%
2-6
Revision 4