M1AFS600-PQ208 Datasheet, PDF (20/334 Pages) Microsemi Corporation – Fusion Family of Mixed Signal FPGAs

Device Architecture
t_PD
A
NAND2 or
Y
Any Combinatorial
B
Logic
VCCA
t_PD = MAX(t_PD(RR), t_PD(RF), t_PD(FF), t_PD(FR))
where edges are applicable for the
particular combinatorial cell
A, B, C
50%
50%
VCCA
GND
OUT
GND
VCCA
OUT
50%
t_PD
(RR)
t_PD
(RF)
t_PD
(FF)
50%
t_PD
(FR)
GND
Figure 2-4 • Combinatorial Timing Model and Waveforms
50%
50%
2-4
Revision 4