M1AFS600-PQ208 Datasheet, PDF (148/334 Pages) Microsemi Corporation – Fusion Family of Mixed Signal FPGAs

Device Architecture
Analog Quad ACM Description
Table 2-56 maps out the ACM space associated with configuration of the Analog Quads within the
Analog Block. Table 2-56 shows the byte assignment within each quad and the function of each bit within
each byte. Subsequent tables will explain each bit setting and how it corresponds to a particular
configuration. After 3.3 V and 1.5 V are applied to Fusion, Analog Quad configuration registers are
loaded with default settings until the initialization and configuration state machine changes them to user-
defined settings.
Table 2-56 • Analog Quad ACM Byte Assignment
Byte
Bit
Signal (Bx)
Function
Default Setting
Byte 0
0
(AV)
1
2
B0[0]
B0[1]
B0[2]
Scaling factor control – prescaler Highest voltage range
3
B0[3]
Analog MUX select
Prescaler
4
B0[4]
Current monitor switch
Off
5
B0[5]
Direct analog input switch
Off
6
B0[6]
Selects V-pad polarity
Positive
7
B0[7]
Prescaler op amp mode
Power-down
Byte 1
0
(AC)
1
B1[0]
B1[1]
Scaling factor control – prescaler Highest voltage range
2
B1[2]
3
B1[3]
Analog MUX select
Prescaler
4
B1[4]
5
B1[5]
Direct analog input switch
Off
6
B1[6]
Selects C-pad polarity
Positive
7
B1[7]
Prescaler op amp mode
Power-down
Byte 2
0
(AG)
1
B2[0]
B2[1]
Internal chip temperature monitor * Off
Spare
–
2
B2[2]
Current drive control
Lowest current
3
B2[3]
4
B2[4]
Spare
–
5
B2[5]
Spare
–
6
B2[6]
Selects G-pad polarity
Positive
7
B2[7]
Selects low/high drive
Low drive
Byte 3
0
(AT)
1
B3[0]
B3[1]
Scaling factor control – prescaler Highest voltage range
2
B3[2]
3
B3[3]
Analog MUX select
Prescaler
4
B3[4]
5
B3[5]
Direct analog input switch
Off
6
B3[6]
–
–
7
B3[7]
Prescaler op amp mode
Power-down
Note: *For the internal temperature monitor to function, Bit 0 of Byte 2 for all 10 Quads must be set.
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Revision 4