M1AFS600-PQ208 Datasheet, PDF (323/334 Pages) Microsemi Corporation – Fusion Family of Mixed Signal FPGAs

Fusion Family of Mixed Signal FPGAs
Revision
v2.0, Revision 1
(continued)
Preliminary v1.7
(October 2008)
Advance v1.6
(August 2008)
Advance v1.5
(July 2008)
Changes
Page
Table 3-6 • Package Thermal Resistance was updated to include new data.
3-7
In EQ 4 to EQ 6, the junction temperature was changed from 110°C to 100°C.
3-8 to 3-8
Table 3-8 • AFS1500 Quiescent Supply Current Characteristics through Table 3-11 •
AFS090 Quiescent Supply Current Characteristics are new and have replaced the
Quiescent Supply Current Characteristics (IDDQ) table.
3-10 to
3-16
In Table 3-14 • Different Components Contributing to the Dynamic Power 3-22
Consumption in Fusion Devices, the power supply for PAC9 and PAC10 were
changed from VMV/VCC to VCCI.
In Table 3-15 • Different Components Contributing to the Static Power Consumption 3-23
in Fusion Devices, the power supply for PDC7 and PDC8 were changed from
VMV/VCC to VCCI. PDC1 was updated from TBD to 18.
The "QN108" table was updated to remove the duplicates of pins B12 and B34.
4-2
The version number category was changed from Advance to Preliminary, which
means the datasheet contains information based on simulation and/or initial
characterization. The information is believed to be correct, but changes are possible.
For the VIL and VIH parameters, 0.30 * VCCI was changed to 0.35 * VCCI and 0.70
* VCCI was changed to 0.65 * VCCI in Table 2-126 • Minimum and Maximum DC
Input and Output Levels.
2-196
The version number category was changed from Advance to Preliminary, which N/A
means the datasheet contains information based on simulation and/or initial
characterization. The information is believed to be correct, but changes are possible.
The following updates were made to Table 2-141 • Minimum and Maximum DC Input
and Output Levels:
Temperature
Digital Output
213
00 1111 1101
283
01 0001 1011
358
01 0110 0110 – only the digital output was updated.
Temperature 358 remains in the temperature column.
2-203
In Advance v1.2, the "VAREF Analog Reference Voltage" pin description was 2-228
significantly updated but the change was not noted in the change table.
The title of the datasheet changed from Actel Programmable System Chips to Actel N/A
Fusion Mixed Signal FPGAs. In addition, all instances of programmable system chip
were changed to mixed signal FPGA.
The references to the Peripherals User’s Guide in the "No-Glitch MUX (NGMUX)" 2-32, 2-42
section and "Voltage Regulator Power Supply Monitor (VRPSM)" section were
changed to Fusion Handbook.
The following bullet was updated from High-Voltage Input Tolerance: ±12 V to High-
I
Voltage Input Tolerance: 10.5 V to 12 V.
The following bullet was updated from Programmable 1, 3, 10, 30 µA and 25 mA
I
Drive Strengths to Programmable 1, 3, 10, 30 µA and 20 mA Drive Strengths.
Revision 4
5-7