English
Language : 

M1AFS600-PQ208 Datasheet, PDF (229/334 Pages) Microsemi Corporation – Fusion Family of Mixed Signal FPGAs
Fusion Family of Mixed Signal FPGAs
Table 2-169 • AC Waveforms, Measuring Points, and Capacitive Loads
Input Low (V)
Input High (V)
Measuring Point* (V)
1.075
1.325
Cross point
Note: *Measuring point = Vtrip. See Table 2-90 on page 2-169 for a complete table of trip points.
VREF (typ.) (V)
–
Timing Characteristics
Table 2-170 • LVDS
Commercial Temperature Range Conditions: TJ = 70°C, Worst-Case VCC = 1.425 V,
Worst-Case VCCI = 2.3 V
Applicable to Pro I/Os
Speed Grade
Std.
tDOUT
0.66
tDP
2.10
tDIN
0.04
tPY
1.82
Units
ns
–1
0.56
1.79
0.04
1.55
ns
–2
0.49
1.57
0.03
1.36
ns
Note: For the derating values at specific junction temperature and voltage supply levels, refer to Table 3-7 on
page 3-9.
BLVDS/M-LVDS
Bus LVDS (BLVDS) and Multipoint LVDS (M-LVDS) specifications extend the existing LVDS standard to
high-performance multipoint bus applications. Multidrop and multipoint bus configurations can contain
any combination of drivers, receivers, and transceivers. Microsemi LVDS drivers provide the higher drive
current required by BLVDS and M-LVDS to accommodate the loading. The driver requires series
terminations for better signal quality and to control voltage swing. Termination is also required at both
ends of the bus, since the driver can be located anywhere on the bus. These configurations can be
implemented using TRIBUF_LVDS and BIBUF_LVDS macros along with appropriate terminations.
Multipoint designs using Microsemi LVDS macros can achieve up to 200 MHz with a maximum of 20
loads. A sample application is given in Figure 2-135. The input and output buffer delays are available in
the LVDS section in Table 2-171.
Example: For a bus consisting of 20 equidistant loads, the following terminations provide the required
differential voltage, in worst-case industrial operating conditions at the farthest receiver: RS = 60  and
RT = 70 , given Z0 = 50  (2") and Zstub = 50  (~1.5").
Receiver
EN
R
+
-
Transceiver
EN
T
+
-
Driver
D EN
+
-
Receiver
EN
R
+
-
RS RS
RS RS
RS RS
RS RS
Zstub
Z0
Zstub
Zstub
Z0
Zstub
Zstub
Z0
Zstub
Zstub
Z0
Zstub ...
RT Z0
Z0
Z0
Z0
Transceiver
EN
T
+
-
RS RS
BIBUF_LVDS
Z0
Z0
Z0
Z0
RT
Figure 2-135 • BLVDS/M-LVDS Multipoint Application Using LVDS I/O Buffers
Revision 4
2- 213