M1AFS600-PQ208 Datasheet, PDF (177/334 Pages) Microsemi Corporation – Fusion Family of Mixed Signal FPGAs

Fusion Family of Mixed Signal FPGAs
User I/O Naming Convention
Due to the comprehensive and flexible nature of Fusion device user I/Os, a naming scheme is used to
show the details of the I/O (Figure 2-113 on page 2-161 and Figure 2-114 on page 2-162). The name
identifies to which I/O bank it belongs, as well as the pairing and pin polarity for differential I/Os.
I/O Nomenclature = Gmn/IOuxwByVz
Gmn is only used for I/Os that also have CCC access—i.e., global pins.
G = Global
m = Global pin location associated with each CCC on the device: A (northwest corner), B (northeast corner), C
(east middle), D (southeast corner), E (southwest corner), and F (west middle).
n = Global input MUX and pin number of the associated Global location m, either A0, A1, A2, B0, B1, B2, C0, C1,
or C2. Figure 2-22 on page 2-27 shows the three input pins per clock source MUX at CCC location m.
u = I/O pair number in the bank, starting at 00 from the northwest I/O bank and proceeding in a clockwise
direction.
x = P (Positive) or N (Negative) for differential pairs, or R (Regular – single-ended) for the I/Os that support single-
ended and voltage-referenced I/O standards only. U (Positive-LVDS only) or V (Negative-LVDS only) restrict
the I/O differential pair from being selected as an LVPECL pair.
w = D (Differential Pair), P (Pair), or S (Single-Ended). D (Differential Pair) if both members of the pair are bonded
out to adjacent pins or are separated only by one GND or NC pin; P (Pair) if both members of the pair are
bonded out but do not meet the adjacency requirement; or S (Single-Ended) if the I/O pair is not bonded out.
For Differential (D) pairs, adjacency for ball grid packages means only vertical or horizontal. Diagonal
adjacency does not meet the requirements for a true differential pair.
B = Bank
y = Bank number (0–3). The Bank number starts at 0 from the northwest I/O bank and proceeds in a clockwise
direction.
V = Reference voltage
z = Minibank number
Standard I/O Bank
CCC
"A"
Bank 0
CCC
"B"
Bank 3
CCC/PLL
"F"
Bank 3
AFS090
AFS250
Bank 1
CCC
"C"
Bank 1
CCC
"E"
Bank 2 (analog)
CCC
"D"
Analog Quads
Figure 2-113 • Naming Conventions of Fusion Devices with Three Digital I/O Banks
Revision 4
2- 161