SH7201 Datasheet, PDF (943/1196 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Section 22 I/O Ports
22.4.2 Port D Data Register (PDDR)
PDDR is a 16-bit readable/writable register that stores port D data. Bits PD14DR to PD0DR
correspond to pins PD14 to PD0, respectively.
If a pin is set to the general output function, that pin will output the value written to the
corresponding bit in PDDR, and the register value is read from PDDR regardless of the state of the
pin.
If a pin is set to the general input function, the pin state, not the register value, will be returned if
PDDR is read. Also, if a value is written to PDDR, although the value will actually be written, it
will have no influence on the state of the pin. Table 22.8 summarizes the PDDR read/write
operations.
Bit 15 in PDDR is reserved. This bit is read as 0. The write value should always be 0.
PDDR is initialized to H'0000 by a power-on reset or in deep standby mode. This register is not
initialized either by a manual reset or by switching to sleep mode or software standby mode.
Bit: 15
—
Initial value: 0
R/W: R
14 13 12 11 10
PD14 PD13 PD12 PD11 PD10
DR DR DR DR DR
0
0
0
0
0
R/W R/W R/W R/W R/W
9
PD9
DR
0
R/W
8
PD8
DR
0
R/W
7
PD7
DR
0
R/W
6
PD6
DR
0
R/W
5
PD5
DR
0
R/W
4
PD4
DR
0
R/W
3
PD3
DR
0
R/W
2
PD2
DR
0
R/W
1
PD1
DR
0
R/W
0
PD0
DR
0
R/W
Table 22.8 Port D Data Register (PDDR) Read/Write Operations
PDIOR
0
1
Pin Function
General input
Read
Pin state
Other than general
input
General output
Other than general
output
Pin state
Value of
PDDR
Value of
PDDR
Write
The value is written to PDDR but there is no
effect on the pin state.
The value is written to PDDR but there is no
effect on the pin state.
The value written is output from the pin.
The value is written to PDDR but there is no
effect on the pin state.
Rev. 2.00 Sep. 07, 2007 Page 915 of 1164
REJ09B0321-0200