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SH7201 Datasheet, PDF (1074/1196 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series
Section 28 List of Registers
28.2 Register Bits
Register addresses and bit names of the on-chip peripheral modules are described below.
Each line covers eight bits, and 16-bit and 32-bit registers are shown as 2 or 4 lines, respectively.
Register
Abbreviation
Bits 31/
23/15/7
SYCBEEN
STSCLR



SYCBESTS1 



SYCBESTS2 



SYCBESW
00CPEN



CS0CNT




CS0REC




CS1CNT




CS1REC




Bits30/
22/14/6






PTO

ETO























Bits 29/
21/13/5






PER

EER

OER
SHER
10CPEN




BSIZE1







BSIZE1






Bits28/
20/12/4












11CPEN




BSIZE0







BSIZE0






Bits 27/
19/11/3




















WRCV3
RRCV3






WRCV3
RRCV3


Bits26/
18/10/2

TOEN


















WRCV2
RRCV2






WRCV2
RRCV2


Bits 25/
17/9/1

IGAEN




PMST1

EMST1

OMST1
SHMST1








WRCV1
RRCV1






WRCV1
RRCV1


Bits24/
16/8/0






PMST0

EMST0

OMST0
SHMST0





EXENB


WRCV0
RRCV0



EXENB


WRCV0
RRCV0


Module
Bus Monitor
BSC
Rev. 2.00 Sep. 07, 2007 Page 1046 of 1164
REJ09B0321-0200