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SH7201 Datasheet, PDF (1146/1196 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series
Section 29 Electrical Characteristics
CKIO
Tw1 Tw2 Tend (Trd) Tpw1 Tpw2 Tend (Trd) Tpw1 Tpw2 Tend (Trd) Tpw1 Tpw2 Tend (Trd) Tn1
Ts
tAD1
tAD1
tAD1
tAD1
tAD1
A27 to A0
tBCD
tBCD
tBCD
tBCD
tBCD
BC3 to BC0
CSn
tCSD1
tRSD
tRSD tRSD
tRSD tRSD
tRSD tRSD
tCSD1
tRSD
RD
tRDS1
tRDH1
tRDS1
tRDH1
tRDS1
tRDH1
tRDS1
tRDH1
D31 to D0
Figure 29.11 Basic Bus Timing for External Address Space
(Page Read Access, Normal Access Compatible Mode)
CKIO
Tw1
Tw2 Tend (Trd) Tpw1 Tend (Trd) Tpw1 Tend (Trd) Tpw1 Tend (Trd) Tn1
tAD1
tAD1
tAD1
tAD1
tAD1
A27 to A0
BC3 to BC0
tBCD
tCSD1
tRDH1
tBCD
tBCD tRDH1
tRDH1
tBCD
tRDH1
tBCD
tCSD1
CSn
tRSD
tRSD
RD
tRDS1
tRDS1
tRDS1
tRDS1
D31 to D0
tAD1
tBCD
Figure 29.12 Basic Bus Timing for External Address Space
(Page Read Access, External Read Data Sequential Assert Mode)
Rev. 2.00 Sep. 07, 2007 Page 1118 of 1164
REJ09B0321-0200