SH7201 Datasheet, PDF (1070/1196 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Section 28 List of Registers
Register Name
Master control register_0
General status register_0
Bit configuration register 1_0
Bit configuration register 0_0
Interrupt request register_0
Interrupt mask register_0
Transmit error counter_0/
Receive error counter_0
Transmit pending register 1_0
Transmit pending register 0_0
Transmit cancel register 0_0
Transmit acknowledge register 0_0
Abort acknowledge register 0_0
Data frame receive pending register 0_0
Remote frame receive pending register 0_0
Mailbox interrupt mask register0_0
Unread message status register 0_0
Mailbox 0
Control 0
LAFM
Data
Control 1
Abbreviation
MCR_0
GSR_0
BCR1_0
BCR0_0
IRR_0
IMR_0
TEC_0/
REC_0
TXPR1_0
TXPR0_0
TXCR0_0
TXACK0_0
ABACK0_0
RXPR0_0
RFPR0_0
MBIMR0_0
UMSR0_0
CONTROL0H
CONTROL0L
LAFMH
LAFML
MSG_DATA[0]
MSG_DATA[1]
MSG_DATA[2]
MSG_DATA[3]
MSG_DATA[4]
MSG_DATA[5]
MSG_DATA[6]
MSG_DATA[7]
CONTROL1H
CONTROL1L
Number
of Bits
16
16
16
16
16
16
16
Address
H'FFFF0000
H'FFFF0002
H'FFFF0004
H'FFFF0006
H'FFFF0008
H'FFFF000A
H'FFFF000C
16
H'FFFF0020
16
H'FFFF0022
16
H'FFFF002A
16
H'FFFF0032
16
H'FFFF003A
16
H'FFFF0042
16
H'FFFF004A
16
H'FFFF0052
16
H'FFFF005A
16
H'FFFF0100
16
H'FFFF0102
16
H'FFFF0104
16
H'FFFF0106
8
H'FFFF0108
8
H'FFFF0109
8
H'FFFF010A
8
H'FFFF010B
8
H'FFFF010C
8
H'FFFF010D
8
H'FFFF010E
8
H'FFFF010F
8
H'FFFF0110
8
H'FFFF0111
Module
RCAN-ET
Access
Size
16
16
16
16
16
16
16
32
16
16
16
16
16
16
16
16, 32
16
16, 32
16
8, 16, 32
8
8, 16
8
8, 16, 32
8
8, 16
8
8, 16
8
Rev. 2.00 Sep. 07, 2007 Page 1042 of 1164
REJ09B0321-0200