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SH7201 Datasheet, PDF (1026/1196 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series
Section 25 Power-Down Modes
25.2.8 RAM Retaining Area Specifying Register (RAMKP)
RAMKP is an 8-bit readable/writable register that specifies whether or not to retain data in the
corresponding on-chip RAM area in deep standby mode. RAMKP is initialized to H'00 by a
power-on reset or in deep standby mode but retains its previous value by a manual reset or in
software standby mode. Only byte access is valid.
When an RAMKP bit is set to 1, data in the corresponding on-chip RAM area is retained in deep
standby mode. When an RAMWE bit is cleared to 0, data in the corresponding on-chip RAM is
not retained in deep standby mode.
Deep standby mode is canceled by an interrupt (NMI or IRQ) or a reset (manual reset or power-on
reset). However, when deep standby mode is canceled by a power-on reset, the contents in the
corresponding on-chip RAM area are not retained even with the RAMKP bit set to 1.
Bit: 7
6
5
4
3
2
1
0




RAM RAM RAM RAM
KP3 KP2 KP1 KP0
Initial value: 0
0
0
0
0
0
0
0
R/W: R R R R R/W R/W R/W R/W
Bit
7 to 4
3
2
1
0
Initial
Bit Name Value R/W Description

All 0
R
Reserved
These bits are always read as 0. The write value
should always be 0.
RAMKP3 0
R/W RAM Retaining Area 3 (corresponding RAM
addresses: H'FFF86000 to H'FFF87FFF)
0: Data in RAM is not retained in deep standby mode
1: Data in RAM is retained in deep standby mode
RAMKP2 0
R/W RAM Retaining Area 2 (corresponding RAM
addresses: H'FFF84000 to H'FFF85FFF)
0: Data in RAM is not retained in deep standby mode
1: Data in RAM is retained in deep standby mode
RAMKP1 0
R/W RAM Retaining Area 1 (corresponding RAM
addresses: H'FFF82000 to H'FFF83FFF)
0: Data in RAM is not retained in deep standby mode
1: Data in RAM is retained in deep standby mode
RAMKP0 0
R/W RAM Retaining Area 0 (corresponding RAM
addresses: H'FFF80000 to H'FFF81FFF)
0: Data in RAM is not retained in deep standby mode
1: Data in RAM is retained in deep standby mode
Rev. 2.00 Sep. 07, 2007 Page 998 of 1164
REJ09B0321-0200