SH7201 Datasheet, PDF (1072/1196 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Section 28 List of Registers
Register Name
Abort acknowledge register 0_1
Data frame receive pending register 0_1
Remote frame receive pending register 0_1
Mailbox interrupt mask register0_1
Unread message status register 0_1
Mailbox 0
Control 0
LAFM
Data
Mailbox n
(n = 1 to 15)
Control 1
Control 0
LAFM
Data
Abbreviation
ABACK0_1
RXPR0_1
RFPR0_1
MBIMR0_1
UMSR0_1
CONTROL0H
CONTROL0L
LAFMH
LAFML
MSG_DATA[0]
MSG_DATA[1]
MSG_DATA[2]
MSG_DATA[3]
MSG_DATA[4]
MSG_DATA[5]
MSG_DATA[6]
MSG_DATA[7]
CONTROL1H
CONTROL1L
CONTROL0H
CONTROL0L
LAFMH
LAFML
MSG_DATA[0]
MSG_DATA[1]
MSG_DATA[2]
MSG_DATA[3]
MSG_DATA[4]
Number
of Bits
16
16
16
16
16
16
16
16
16
8
8
8
8
8
8
8
8
8
8
16
16
16
16
8
8
8
8
8
Address
Module
H'FFFF083A RCAN-ET
H'FFFF0842
H'FFFF084A
H'FFFF0852
H'FFFF085A
H'FFFF0900
H'FFFF0902
H'FFFF0904
H'FFFF0906
H'FFFF0908
H'FFFF0909
H'FFFF090A
H'FFFF090B
H'FFFF090C
H'FFFF090D
H'FFFF090E
H'FFFF090F
H'FFFF0910
H'FFFF0911
H'FFFF0900
+ n × 32
H'FFFF0902
+ n × 32
H'FFFF0904
+ n × 32
H'FFFF0906
+ n × 32
H'FFFF0908•n×
32
H'FFFF0909•n×
32
H'FFFF090A
+ n × 32
H'FFFF090B
+ n × 32
H'FFFF090C
+ n × 32
Access
Size
16
16
16
16
16
16, 32
16
16, 32
16
8, 16, 32
8
8, 16
8
8, 16, 32
8
8, 16
8
8, 16
8
16, 32
16
16, 32
16
8, 16, 32
8
8, 16
8
8, 16, 32
Rev. 2.00 Sep. 07, 2007 Page 1044 of 1164
REJ09B0321-0200