SH7201 Datasheet, PDF (1043/1196 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Section 26 User Debugging Interface (H-UDI)
26.3 Register Descriptions
The H-UDI has the following registers.
Table 26.2 Register Configuration
Register Name
Bypass register
Instruction register
Abbreviation R/W
SDBPR

SDIR
R
Initial Value

H'EFFD
Address

H'FFFD9000
Access Size

16
26.3.1 Bypass Register (SDBPR)
SDBPR is a 1-bit register that cannot be accessed by the CPU. When SDIR is set to BYPASS
mode, SDBPR is connected between H-UDI pins UDTDI and UDTDO. The initial value is
undefined.
Rev. 2.00 Sep. 07, 2007 Page 1015 of 1164
REJ09B0321-0200