SH7201 Datasheet, PDF (887/1196 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Section 19 Controller Area Network (RCAN-ET)
19.6.3 Message Transmission Sequence
(1) Message Transmission Request
The following sequence is an example to transmit a CAN frame onto the bus. As described in the
previous register section, please note that IRR8 is set when one of the TXACK or ABACK bits is
set, meaning one of the Mailboxes has completed its transmission or transmission abortion and is
now ready to be updated for the next transmission, whereas, the GSR2 means that there is
currently no transmission request made (No TXPR flags set).
RCAN-ET is in Normal Mode
(MBC[n] = 0)
Mailbox[n] is ready
to be updated for
next transmission
Update Message Data of
Mailbox[n]
Write '1' to the TXPR[n] bit
at any desired time
Clear TXACK[n]
Yes
TXACK[n] set?
No
Monitor for the next interrupt
Internal Arbitration
No
'n' Highest Priority?
Yes
Yes
IRR8 set?
No
Monitor for the next interrupt
Transmission Start
CAN Bus
Arbitration
Acknowledge Bit
CAN Bus
Note: n = 0 to 15 (mailbox number)
Figure 19.9 Transmission Request
(2) Internal Arbitration for Transmission
The following diagram explains how RCAN-ET manages to schedule transmission-requested
messages in the correct order based on the CAN identifier. 'Internal arbitration' picks up the
highest priority message amongst transmit-requested messages.
Rev. 2.00 Sep. 07, 2007 Page 859 of 1164
REJ09B0321-0200