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SH7201 Datasheet, PDF (1144/1196 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series
Section 29 Electrical Characteristics
29.3.3 Bus Timing
Table 29.7 Bus Timing*1
Conditions: PVCC = VCCR = PLLVCC = 3.0 V to 3.6 V, AVCC = 3.0 V to 3.6 V,
PVCC − 0.3 V ≤ AVCC ≤ PVCC, AVref = 3.0 V to AVCC,
PVSS = VSSR = PLLVSS = AVSS = 0 V
Item
Address delay time 1
(external space)
Address delay time 2
(SDRAM space)
Byte control delay time
Chip select delay time 1
(external space)
Chip select delay time 2
(SDRAM space)
Read strobe delay time
Read data setup time 1
(external space)
Read data setup time 2
(SDRAM space)
Read data hold time 1
(external space)
Read data hold time 2
(SDRAM space)
Write enable delay time 1
(external space)
Write enable delay time 2
(SDRAM space)
Write data delay time 1
(external space)
Write data delay time 2
(SDRAM space)
Write data hold time 1
(external space)
Write data hold time 2
(SDRAM space)
Symbol
t
AD1
t
AD2
tBCD
t
CSD1
tCSD2
t
RSD
t
RDS1
tRDS2
tRDH1
t
RDH2
tWED1
tWED2
t
WDD1
tWDD2
tWDH1
t
WDH2
Bφ = 60 MHz*2
Min. Max. Unit

13
ns
1
13
ns

13
ns

13
ns
1
13
ns

13
ns
13

ns
8

ns
0

ns
2

ns

13
ns
1
13
ns

13
ns

13
ns
1

ns
1

ns
Figure
Figures 29.10 to 29.14
Figures 29.15 to 29.21
Figures 29.10 to 29.14
Figures 29.10 to 29.14
Figures 29.15 to 29.21
Figures 29.10 to 29.14
Figures 29.10 to 29.14
Figures 29.15 to 29.21
Figures 29.10 to 29.14
Figures 29.15 to 29.21
Figures 29.10 to 29.14
Figures 29.15 to 29.21
Figures 29.10 to 29.14
Figures 29.15 to 29.21
Figures 29.10 to 29.14
Figures 29.15 to 29.21
Rev. 2.00 Sep. 07, 2007 Page 1116 of 1164
REJ09B0321-0200