SH7201 Datasheet, PDF (903/1196 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Section 20 A/D Converter (ADC)
Table 20.3 indicates the pairings of analog input channels and ADDR.
Bit: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
——————
Initial value: 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W: R R R R R R R R R R R R R R R R
Initial
Bit
Bit Name Value R/W
15 to 6
All 0
R
5 to 0 
All 0
R
Description
Bit data (10 bits)
Reserved
These bits are always read as 0. The write value
should always be 0.
Table 20.3 Analog Input Channels and ADDR
Analog Input Channel
AN0
AN1
AN2
AN3
AN4
AN5
AN6
AN7
A/D Data Register where Conversion Result is Stored
ADDRA
ADDRB
ADDRC
ADDRD
ADDRE
ADDRF
ADDRG
ADDRH
Rev. 2.00 Sep. 07, 2007 Page 875 of 1164
REJ09B0321-0200