SH7201 Datasheet, PDF (614/1196 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Section 12 Multi-Function Timer Pulse Unit 2 (MTU2)
(20) Operation when Error Occurs during Phase Counting Mode Operation, and Operation
is Restarted in Phase Counting Mode
Figure 12.144 shows an explanatory diagram of the case where an error occurs in phase counting
mode and operation is restarted in phase counting mode after re-setting.
1
2
Power-on TMDR
reset (PCM)
MTU2
module output
3
4
5
TIOR PFC TSTR
(1 init (MTU2) (1)
0 out)
6
Match
7
8
9
Error PFC TSTR
occurs (PORT) (0)
10
TMDR
(PCM)
11
12
13
TIOR PFC TSTR
(1 init (MTU2) (1)
0 out)
TIOC*A
TIOC*B
Port output
PB, PC, PD*¹
High-Z
PB, PC, PD*²
High-Z
Notes: 1. This pin is multiplexed with TIOC*A.
2. This pin is multiplexed with TIOC*B.
Figure 12.144 Error Occurrence in Phase Counting Mode,
Recovery in Phase Counting Mode
1 to 9 are the same as in figure 12.141.
10. Not necessary when restarting in phase counting mode.
11. Initialize the pins with TIOR.
12. Set MTU2 output with the PFC.
13. Operation is restarted by TSTR.
Rev. 2.00 Sep. 07, 2007 Page 586 of 1164
REJ09B0321-0200