SH7201 Datasheet, PDF (933/1196 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Section 22 I/O Ports
• Port A Data Register H (PADRH)
Bit: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
PA31 PA30 PA29 PA28 PA27 PA26 PA25 PA24 PA23 PA22 PA21 PA20 PA19 PA18 PA17 PA16
DR DR DR DR DR DR DR DR DR DR DR DR DR DR DR DR
Initial value: 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W: R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
• Port A Data Register L (PADRL)
Bit: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
PA15 PA14 PA13 PA12 PA11 PA10 PA9 PA8 PA7 PA6 PA5 PA4 PA3 PA2 PA1 PA0
DR DR DR DR DR DR DR DR DR DR DR DR DR DR DR DR
Initial value: 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W: R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
Table 22.2 Port A Data Registers H and L (PADRH and PADRL) Read/Write Operations
PAIORH,
PAIORL
0
1
Pin Function
General input
Read
Pin state
Other than general
input
General output
Other than general
output
Pin state
Value of
PADRH and
PADRL
Value of
PADRH and
PADRL
Write
The value is written to PADRH and PADRL
but there is no effect on the pin state.
The value is written to PADRH and PADRL
but there is no effect on the pin state.
The value written is output from the pin.
The value is written to PADRH and PADRL
but there is no effect on the pin state.
Rev. 2.00 Sep. 07, 2007 Page 905 of 1164
REJ09B0321-0200