SH7201 Datasheet, PDF (559/1196 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Section 12 Multi-Function Timer Pulse Unit 2 (MTU2)
(1) Example of Dead Time Compensation Setting Procedure
Figure 12.80 shows an example of dead time compensation setting procedure by using three
counters in channel 5.
Complementary PWM mode
[1] ^{[1] Place channels 3 and 4 in complementary PWM mode. For details,}
refer to section 12.4.8, Complementary PWM Mode.
External pulse width
measurement
Start count operation in
channels 3 to 5
[2] ^{[2] Specify the external pulse width measurement function for the target}
TIOR in channel 5. For details, refer to section 12.4.10, External
Pulse Width Measurement.
[3]
[3] Set bits CST3 and CST4 in TSTR and bits CST5U, CST5V, and
CST5W in TSTR2 to 1 to start count operation.
TCNT_5 input capture occurs
[4] * ^{[4] When the capture condition specified in TIOR is satisfied, the}
TCNT_5 value is captured in TGR_5.
Interrupt processing
[5] ^{[5] For U-phase dead time compensation, when an interrupt is}
generated at the crest (TGIA_3) or trough (TCIV_4) in
complementary PWM mode, read the TGRU_5 value, calculate the
difference in time in TGRB_3, and write the corrected value to
TGRD_3 in the interrupt processing.
For the V phase and W phase, read the TGRV_5 and TGRW_5
values and write the corrected values to TGRC_4 and TGRD_4,
respectively, in the same way as for U-phase compensation.
The TCNT_5 value should be cleared through the TCNTCMPCLR
setting or by software.
Notes: The PFC settings must be completed in advance.
* As an interrupt flag is set under the capture condition specified in TIOR, do not enable
interrupt requests in TIER_5.
Figure 12.80 Example of Dead Time Compensation Setting Procedure
MTU
ch3/4
ch5
Complementary
PWM output
Dead time
delay input
≠
- _DC +
Inverter output
monitor signals
W
V
U
Motor
W
V
U
W
V
U
Figure 12.81 Example of Motor Control Circuit Configuration
Rev. 2.00 Sep. 07, 2007 Page 531 of 1164
REJ09B0321-0200