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SH7201 Datasheet, PDF (1122/1196 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series
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Section 28 List of Registers
Register
Abbreviation
T8TCR_0
T8TCR_1
T8TCSR_0
T8TCSR_1
T8TCORA_0
T8TCORA_1
T8TCORB_0
T8TCORB_1
T8TCNT_0
T8TCNT_1
T8TCCR_0
T8TCCR_1
ADDRA
ADDRB
ADDRC
ADDRD
ADDRE
ADDRF
ADDRG
ADDRH
ADCSR
DADR0
DADR1
DACR
SCSMR_0
SCBRR_0
SCSCR_0
SCFTDR_0
SCFSR_0
SCFRDR_0
SCFCR_0
SCFDR_0
SCSPTR_0
SCLSR_0
SCSMR_1
SCBRR_1
Power-on
Reset
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Undefined
Initialized
Undefined
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Manual
Reset
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Software
Standby
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Deep
Standby
Initialized*1
Initialized*1
Initialized*1
Initialized*1
Initialized*1
Initialized*1
Initialized*1
Initialized*1
Initialized*1
Initialized*1
Initialized*1
Initialized*1
Initialized*1
Initialized*1
Initialized*1
Initialized*1
Initialized*1
Initialized*1
Initialized*1
Initialized*1
Initialized*1
Initialized*1
Initialized*1
Initialized*1
Initialized*1
Initialized*1
Initialized*1
Initialized*1
Initialized*1
Initialized*1
Initialized*1
Initialized*1
Initialized*1
Initialized*1
Initialized*1
Initialized*1
Module
Standby
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Sleep
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Module
TMR
ADC
DAC
SCIF
Rev. 2.00 Sep. 07, 2007 Page 1094 of 1164
REJ09B0321-0200
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