SH7201 Datasheet, PDF (332/1196 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Section 11 Direct Memory Access Controller (DMAC)
11.3 Register Descriptions
The DMAC has the following registers. All registers are initialized by a power-on reset or in deep
standby mode.
Table 11.2 Register Configuration
Channel Register Name
Abbreviation R/W
0
DMA current source address
DMCSADR0 R/W
register 0
DMA current destination address DMCDADR0 R/W
register 0
DMA current byte count register 0 DMCBCT0 R/W
DMA mode register 0
DMMOD0 R/W
DMA reload source address
register 0
DMRSADR0 R/W
DMA reload destination address DMRDADR0 R/W
register 0
DMA reload byte count register 0 DMRBCT0 R/W
DMA control register A0
DMCNTA0 R/W
DMA control register B0
DMCNTB0 R/W
1
DMA current source address
DMCSADR1 R/W
register 1
DMA current destination address DMCDADR1 R/W
register 1
DMA current byte count register 1 DMCBCT1 R/W
DMA mode register 1
DMMOD1 R/W
DMA reload source address
register 1
DMRSADR1 R/W
DMA reload destination address DMRDADR1 R/W
register 1
DMA reload byte count register 1 DMRBCT1 R/W
DMA control register A1
DMCNTA1 R/W
DMA control register B1
DMCNTB1 R/W
Initial Value Address
Undefined H'FF460000
Access
Size
32
Undefined H'FF460004 32
Undefined
Undefined
Undefined
H'FF460008 32
H'FF46000C 32
H'FF460200 32
Undefined H'FF460204 32
Undefined H'FF460208
H'00000000 H'FF460400
H'00000000 H'FF460404
Undefined H'FF460010
32
8, 16, 32
8, 16, 32
32
Undefined H'FF460014 32
Undefined
Undefined
Undefined
H'FF460018 32
H'FF46001C 32
H'FF460210 32
Undefined H'FF460214 32
Undefined H'FF460218 32
H'00000000 H'FF460408 8, 16, 32
H'00000000 H'FF46040C 8, 16, 32
Rev. 2.00 Sep. 07, 2007 Page 304 of 1164
REJ09B0321-0200