SH7201 Datasheet, PDF (1049/1196 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Section 27 Advanced User Debugger II (AUD-II)
Section 27 Advanced User Debugger II (AUD-II)
The AUD-II offers functions that support user program debugging with the LSI mounted and
operated in actual performance. Use of the AUD-II simplifies the construction of a simple
emulator, with functions such as monitoring/tuning of on-chip RAM data.
27.1 Features
The AUD-II can be used in RAM monitor mode by setting AUDMD.
RAM monitor mode:
• Functions to read/write modules connected to internal/external buses (except cache and
H-UDI)
• Outputs data corresponding to an address that is externally written to AUDATA
• Transmits data to the address in AUDATA to which address and data are written
27.2 Input/Output Pins
Table 27.1 Pin Configuration
Pin Name
AUD reset
AUD sync signal
AUD clock
AUD mode
AUD data
Symbol
AUDRST
AUDSYNC
AUDCK
AUDMD
AUDATA[3:0]
Function
AUD reset input
Data start position identification signal input
External clock input
Mode select input (H)
Monitor address input and data input/output
Rev. 2.00 Sep. 07, 2007 Page 1021 of 1164
REJ09B0321-0200