SH7201 Datasheet, PDF(1162/1196 Page) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

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SH7201 Datasheet, PDF (1162/1196 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

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Section 29 Electrical Characteristics

SDA

tBUF

VIH

VIL

tSTAH

tSCLH

tSTAS

tSP tSTOS

SCL

P* S*

tSCLL

Sr*

tSf

tSr

tSCL

tSDAH

[Legend]

S: Start condition

P: Stop condition

Sr: Start condition for retransmission

P*

tSDAS

Figure 29.33 I2C Bus Interface 3 Input/Output Timing

29.3.11 SSI Module Timing

Table 29.15 SSI Module Timing

Conditions: PVCC = VCCR = PLLVCC = 3.0 V to 3.6 V, AVCC = 3.0 V to 3.6 V,

PVCC â 0.3 V â¤ AVCC â¤ PVCC, AVref = 3.0 V to AVCC,

PVSS = VSSR = PLLVSS = AVSS = 0 V

Item

Output clock cycle

Input clock cycle

Clock high

Clock low

Clock rise time

Delay

Setup time

Hold time

AUDIO_CLK

input frequency

Symbol Min.

tO

80

tI

80

tHC

32

tLC

32

t

RC

ï£§

tDTR

ï£§

t

15

SR

t

5

HTR

fAUDIO

1

Typ.

ï£§

ï£§

ï£§

ï£§

ï£§

ï£§

ï£§

ï£§

ï£§

Max. Unit

64000 ns

64000 ns

ï£§

ns

ï£§

ns

20 ns

50 ns

ï£§

ns

ï£§

ns

40 MHz

Remarks

Output

Input

Bidirectional

Output

(100 pF)

Transmit

Receive

Receive

Figure

Figure 29.34

Figures 29.35

and 29.36

Figures 29.37

and 29.38

Figures 29.37

and 29.38

Figure 29.39

Rev. 2.00 Sep. 07, 2007 Page 1134 of 1164

REJ09B0321-0200

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