SH7201 Datasheet, PDF (16/1196 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

11.10 Reload Function................................................................................................................. 363
11.11 Rotate Function.................................................................................................................. 365
11.12 Transfer Speed ................................................................................................................... 366
11.13 Usage Note......................................................................................................................... 367
11.13.1 Note on Making a Transition To Software Standby
Mode or Deep Standby Mode ............................................................................... 367
Section 12 Multi-Function Timer Pulse Unit 2 (MTU2)................................... 369
12.1 Features.............................................................................................................................. 369
12.2 Input/Output Pins............................................................................................................... 375
12.3 Register Descriptions......................................................................................................... 376
12.3.1 Timer Control Register (TCR).............................................................................. 382
12.3.2 Timer Mode Register (TMDR)............................................................................. 386
12.3.3 Timer I/O Control Register (TIOR)...................................................................... 389
12.3.4 Timer Compare Match Clear Register (TCNTCMPCLR).................................... 408
12.3.5 Timer Interrupt Enable Register (TIER)............................................................... 409
12.3.6 Timer Status Register (TSR)................................................................................. 414
12.3.7 Timer Buffer Operation Transfer Mode Register (TBTM)................................... 421
12.3.8 Timer Input Capture Control Register (TICCR)................................................... 422
12.3.9 Timer A/D Converter Start Request Control Register (TADCR) ......................... 423
12.3.10 Timer A/D Converter Start Request Cycle Set Registers
(TADCORA_4 and TADCORB_4)...................................................................... 426
12.3.11 Timer A/D Converter Start Request Cycle Set Buffer Registers
(TADCOBRA_4 and TADCOBRB_4) ................................................................ 427
12.3.12 Timer Counter (TCNT)......................................................................................... 427
12.3.13 Timer General Register (TGR) ............................................................................. 428
12.3.14 Timer Start Register (TSTR) ................................................................................ 429
12.3.15 Timer Synchronous Register (TSYR)................................................................... 431
12.3.16 Timer Counter Synchronous Start Register (TCSYSTR) ..................................... 433
12.3.17 Timer Read/Write Enable Register (TRWER) ..................................................... 435
12.3.18 Timer Output Master Enable Register (TOER) .................................................... 436
12.3.19 Timer Output Control Register 1 (TOCR1).......................................................... 437
12.3.20 Timer Output Control Register 2 (TOCR2).......................................................... 440
12.3.21 Timer Output Level Buffer Register (TOLBR) .................................................... 443
12.3.22 Timer Gate Control Register (TGCR) .................................................................. 444
12.3.23 Timer Subcounter (TCNTS) ................................................................................. 446
12.3.24 Timer Dead Time Data Register (TDDR)............................................................. 447
12.3.25 Timer Cycle Data Register (TCDR) ..................................................................... 447
12.3.26 Timer Cycle Buffer Register (TCBR)................................................................... 448
12.3.27 Timer Interrupt Skipping Set Register (TITCR)................................................... 448
Rev. 2.00 Sep. 07, 2007 Page xvi of xxviii