SH7201 Datasheet, PDF (1006/1196 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Section 23 Pin Function Controller (PFC)
23.1.10 Port F I/O Register (PFIOR)
PFIOR is a 16-bit readable/writable register that selects the I/O direction for the port F pins. Bits
PF7IOR to PF0IOR correspond to pins PF7 to PF0, respectively. PFIOR is enabled when the
function of the port F pins is set to general-purpose I/O (PF7 to PF0) by PFCR, and are disabled in
other cases. When a bit in PFIOR is set to 1, the corresponding pin is set to output, and when set
to 0, the pin is set to input.
Bits 15 to 8 in PFIOR are reserved. These bits are always read as 0. The write value should always
be 0.
PFIOR is initialized to H'0000 by a power-on reset or by switching to deep standby mode. This
register is not initialized either by a manual reset or by switching to sleep mode or software
standby mode.
Bit: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
—
—
—
—
—
—
—
—
PF7 PF6 PF5 PF4 PF3 PF2 PF1 PF0
IOR IOR IOR IOR IOR IOR IOR IOR
Initial value: 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W: R R R R R R R R R/W R/W R/W R/W R/W R/W R/W R/W
Rev. 2.00 Sep. 07, 2007 Page 978 of 1164
REJ09B0321-0200