SH7201 Datasheet, PDF (610/1196 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Section 12 Multi-Function Timer Pulse Unit 2 (MTU2)
(16) Operation when Error Occurs during PWM Mode 2 Operation, and Operation is
Restarted in Phase Counting Mode
Figure 12.140 shows an explanatory diagram of the case where an error occurs in PWM mode 2
and operation is restarted in phase counting mode after re-setting.
1
2
3
4
5
Power-onTMDR TIOR PFC TSTR
reset (PWM2) (1 init (MTU2) (1)
MTU2
0 out)
module output
6
Match
7
8
9
Error PFC TSTR
occurs (PORT) (0)
10
TMDR
(PCM)
11
12
13
TIOR PFC TSTR
(1 init (MTU2) (1)
0 out)
TIOC*A
Not initialized (cycle register)
TIOC*B
Port output
PB, PC, PD*¹
High-Z
PB, PC, PD*²
High-Z
Notes: 1. This pin is multiplexed with TIOC*A.
2. This pin is multiplexed with TIOC*B.
Figure 12.140 Error Occurrence in PWM Mode 2, Recovery in Phase Counting Mode
1 to 9 are the same as in figure 12.137.
10. Set phase counting mode.
11. Initialize the pins with TIOR.
12. Set MTU2 output with the PFC.
13. Operation is restarted by TSTR.
Rev. 2.00 Sep. 07, 2007 Page 582 of 1164
REJ09B0321-0200