SH7201 Datasheet, PDF (720/1196 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Section 16 Serial Communication Interface with FIFO (SCIF)
Table 16.5 Bit Rates and SCBRR Settings (Clocked Synchronous Mode) (1)
Bit Rate
(bit/s)
110
250
500
1k
2.5 k
5k
10 k
25 k
50 k
100 k
250 k
500 k
1M
2M
Pφ (MHz)
5
8
16
28.7
n
N
n
N
n
N
n
N
n
—
—
—
—
—
—
—
—
—
3
77
3
124 3
249 —
—
—
3
38
2
249 3
124 3
223 3
2
77
2
124 2
249 3
111 3
1
124 1
199 2
99
2
178 2
0
249 1
99
1
199 2
89
2
0
124 0
199 1
99
1
178 1
0
49
0
79
0
159 1
71
1
0
24
0
39
0
79
0
143 0
—
—
0
19
0
39
0
71
0
0
4
0
7
0
15
—
—
0
—
—
0
3
0
7
—
—
0
—
—
0
1
0
3
—
—
—
0
0*
0
1
—
—
—
30
N
—
—
233
116
187
93
187
74
149
74
29
14
—
—
Rev. 2.00 Sep. 07, 2007 Page 692 of 1164
REJ09B0321-0200