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M32C8A Datasheet, PDF (93/372 Pages) Renesas Technology Corp – RENESAS MCU M16C FAMILY / M32C/80 Series
M32C/8A Group
9. Clock Generation Circuits
Processor Mode Register 2(1)
b7 b6 b5 b4 b3 b2 b1 b0
000
0
Symbol
PM2
Address
0013h
After Reset
00h
Bit Symbol
Bit Name
Function
RW
−
(b0)
PM21
PM22
−
(b5-b3)
Reserved bit
Set to 0
RW
System clock protect bit(2, 3)
0: Protects a clock by the PRCR register
1: Disables a clock change
RW
0: CPU clock as count source for the watchdog
WDT count source protect bit(2, 4)
timer
1: On-chip oscillator clock as count source for
RW
the watchdog timer
Reserved bits
Set to 0
RW
PM26
b7 b6
RW
0 0: Clock selected by the CM21 bit
f2n clock source select bits
0 1: XIN clock (fXIND)
PM27
1 0: On-chip oscillator clock (fROC)
1 1: Do not set to this value
RW
NOTES:
1. Set the PM2 register after the PRC1 bit in the PRCR register is set to 1 (write enable).
2. Once bits PM22 and PM21 are set to 1, they cannot be set to 0 by program.
3. When the PM21 bit is set to 1,
• the CPU clock does not stop, even if the WAIT instruction is executed;
• writes to the following bits have no effect.
- the CM02 bit in the CM0 register
- the CM05 bit in the CM0 register
- the CM07 bit in the CM0 register (CPU clock source is not changed)
- the CM10 bit in the CM1 register (the MCU does not enter stop mode)
- the CM17 bit in the CM1 register (CPU clock source is not changed)
- the CM20 bit in the CM2 register (oscillation stop detect function setting is not changed)
- all bits in registers PLC0 and PLC1 (PLL frequency synthesizer setting is not changed)
4. When the PM22 bit is set to 1,
• the on-chip oscillator starts oscillating and the on-chip oscillator clock becomes the count source for the watchdog timer;
• write to the CM10 bit in the CM1 register is disabled (writing a 1 has no effect and the MCU does not enter stop mode);
• the watchdog timer keeps operating when the MCU is in wait mode or in hold state.
Figure 9.7 PM2 Register
Rev.1.00 Jul 15, 2007 Page 76 of 352
REJ09B0385-0100