M32C8A Datasheet, PDF (192/372 Pages) Renesas Technology Corp – RENESAS MCU M16C FAMILY / M32C/80 Series

M32C/8A Group
15. Timers (Timer B)
15.2.3 Pulse Period Measurement Mode, Pulse Width Measurement Mode
In pulse period measurement mode and pulse width measurement mode, the timer measures pulse period or
pulse width of the external signal.
Table 15.11 shows specifications in pulse period measurement mode and pulse width measurement mode.
Figure 15.29 shows a pulse period measurement operation. Figure 15.30 shows a pulse width measurement
operation.
Table 15.11 Specifications of Pulse Period Measurement Mode, Pulse Width Measurement Mode
Item
Count source
f1, f8, f2n⁽¹⁾, fC32
Specification
Count operation
• Counter increments
The counter value is transferred to the reload register when the valid edge of a
pulse is detected. Then the counter becomes 0000h and the
count continues.
Count start condition
The TBiS bit (i = 0 to 5) in the TABSR or TBSR register is set to 1 (count starts)
Count stop condition
The TBiS bit is set to 0 (count stops)
Interrupt request generation timing _{• When the valid edge of a pulse is input}⁽²⁾
• When the timer overflows⁽³⁾
The MR3 bit in the TBiMR register is set to 1 (overflow) simultaneously.
TBiIN pin function
Pulse input
Read from timer
A read from the TBi register returns the contents of the reload register
(measurement results)⁽⁴⁾
Write to timer
The TBi register cannot be written
NOTES:
1. Bits CNT3 to CNT0 in the TCSPR register select no division (n = 0) or divide-by-2n (n = 1 to 15).
2. An interrupt request is not generated when the first valid edge is input after the count starts.
3. To set the MR3 bit to 0 (no overflow), wait for one or more count source cycles to write to the TBiMR register
after the MR3 bit becomes 1, while the TBiS bit is set to 1.
4. A value read from the TBi register is undefined until the second valid edge is detected after the count starts.
Rev.1.00 Jul 15, 2007 Page 175 of 352
REJ09B0385-0100