M32C8A Datasheet, PDF (184/372 Pages) Renesas Technology Corp – RENESAS MCU M16C FAMILY / M32C/80 Series

M32C/8A Group
15. Timers (Timer B)
Timer Bi Mode Register (i = 0 to 5)(Timer Mode)
b7 b6 b5 b4 b3 b2 b1 b0
0
00
Symbol
TB0MR to TB5MR
Address
035Bh, 035Ch, 035Dh, 031Bh, 031Ch, 031Dh
Bit Symbol
Bit Name
Function
TMOD0
TMOD1
Operating mode select bits
b1 b0
0 0: Timer mode
After Reset
00XX 0000b
RW
RW
RW
MR0
RW
Disabled in timer mode.
Can be set to either 0 or 1
MR1
RW
Registers TB0MR and TB3MR:
Set to 0 in timer mode.
RW
MR2
Registers TB1MR, TB2MR, TB4MR, and TB5MR:
Unimplemented.
−
Write 0. Read as undefined value.
MR3
Disabled in timer mode.
Write 0. Read as undefined value.
−
TCK0
b7 b6
RW
0 0: f1
Count source select bits
0 1: f8
1 0: f2n⁽¹⁾
TCK1
1 1: fC32
RW
NOTE:
1. Bits CNT3 to CNT0 in the TCSPR register select no division (n = 0) or divide-by-2n (n = 1 to 15). To select f2n,
set the CST bit in the TCSPR register to 1 before setting bits TCK1 and TCK0 to 10b.
Figure 15.22 TB0MR to TB5MR Registers in Timer Mode
Rev.1.00 Jul 15, 2007 Page 167 of 352
REJ09B0385-0100