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M32C8A Datasheet, PDF (140/372 Pages) Renesas Technology Corp – RENESAS MCU M16C FAMILY / M32C/80 Series
M32C/8A Group
13. DMAC
Table 13.2 DMiSL Register (i = 0 to 3) Function
Setting Value
DMA Request Source
b4 b3 b2 b1 b0
DMA0
0 0 0 0 0 Software trigger
DMA1
DMA2
0 0 0 0 1 Falling edge of INT0
Falling edge of INT1
Falling edge of INT2
0 0 0 1 0 Both edges of INT0
Both edges of INT1
0 0 0 1 1 Timer A0 interrupt request
0 0 1 0 0 Timer A1 interrupt request
0 0 1 0 1 Timer A2 interrupt request
0 0 1 1 0 Timer A3 interrupt request
0 0 1 1 1 Timer A4 interrupt request
0 1 0 0 0 Timer B0 interrupt request
0 1 0 0 1 Timer B1 interrupt request
0 1 0 1 0 Timer B2 interrupt request
0 1 0 1 1 Timer B3 interrupt request
0 1 1 0 0 Timer B4 interrupt request
0 1 1 0 1 Timer B5 interrupt request
0 1 1 1 0 UART0 transmit interrupt request
0 1 1 1 1 UART0 receive interrupt or ACK interrupt request(3)
1 0 0 0 0 UART1 transmit interrupt request
1 0 0 0 1 UART1 receive interrupt or ACK interrupt request(3)
1 0 0 1 0 UART2 transmit interrupt request
1 0 0 1 1 UART2 receive interrupt or ACK interrupt request(3)
1 0 1 0 0 UART3 transmit interrupt request
1 0 1 0 1 UART3 receive interrupt or ACK interrupt request(3)
1 0 1 1 0 UART4 transmit interrupt request
1 0 1 1 1 UART4 receive interrupt or ACK interrupt request(3)
1 1 0 0 0 A/D0 interrupt request
Both edges of INT2
DMA3
Falling edge of INT3(1)
Both edges of INT3(1)
(Note 2)
(Note 2)
NOTES:
1. When the INT3 pin is used for data bus in microprocessor mode, a DMA3 interrupt request cannot be generated by an input signal to
the INT3 pin.
2. The falling edge or both edges of input signal to the INTi pin can be a DMA request source. It is not affected by the INT interrupts (bits
POL and LVS in the INTiIC register, the IFSR register) and vice versa.
3. To switch between the UARTj receive interrupt and ACK interrupt (j = 0 to 4), use the IICM bit in the UiSMR register and IICM2 bit on
the UiSMR2 register. To use the ACK interrupt, set the IICM bit to 1 (I2C mode) and the IICM2 bit to 0 (NACK/ACK interrupt).
Rev.1.00 Jul 15, 2007 Page 123 of 352
REJ09B0385-0100