M32C8A Datasheet, PDF (108/372 Pages) Renesas Technology Corp – RENESAS MCU M16C FAMILY / M32C/80 Series

M32C/8A Group
9. Clock Generation Circuits
Start
(1) Initial setting
RLVL register: bits RLVL2 to RLVL0 = 7
Set an interrupt priority level of each interrupt
(2) Before entering stop mode
I flag = 0
Set the interrupt priority level (ILVL2 to ILVL0) of
the interrupt used to exit stop mode
Set the interrupt priority level of the interrupts,
which is not used to exit stop mode, to 0
FLG register: set IPL
Bits RLVL2 to RLVL0 = the same level as IPL
PRCR register: PRC0 bit = 1
PRC1 bit = 1
CM1 register: CM17 bit = 0
CM2 register: CM21 bit = 0
CM0 register: CM07 bit = 0
When the oscillation stop detect function is used
CM2 register: CM20 bit = 0
Set the wait/stop mode
exit interrupt priority level to 7.
Interrupt disabled
(ILVL2 to ILVL0) > IPL* = (RLVL2 to RLVL0)*
Set the processor interrupt priority level (IPL)*
Set the exit interrupt priority level (RLVL2 to RLVL0)*
Enable writing to registers associated with clocks
Select the main clock as the CPU clock source
(※Set after a main clock oscillation stabilizes)
Disable oscillation stop detect function
I flag = 1
CM1 register: CM10 bit = 1
Stop mode
(3) After exiting wait mode
RLVL register: bits RLVL2 to RLVL0 = 7
Interrupt enabled
All clocks stop⁽¹⁾
Set the exit priority level as soon as exiting wait mode
End
NOTE:
1. Insert the jmp.b instruction as follows after the instruction to set the CM10 bit to 1.
bset 0, cm1
jmp.b LABEL_001
LABEL_001:
nop
nop
nop
nop
mov.b #0, prcr
.
.
.
; all clocks stopped (stop mode)
; jmp.b instruction executed (no instruction
; between jmp.b and LABEL.)
; nop(1)
; nop(2)
; nop(3)
; nop(4)
; protection set
Figure 9.15 Procedure to Enter Stop Mode
Rev.1.00 Jul 15, 2007 Page 91 of 352
REJ09B0385-0100