M32C8A Datasheet, PDF (274/372 Pages) Renesas Technology Corp – RENESAS MCU M16C FAMILY / M32C/80 Series

M32C/8A Group
18. A/D Converter
A/D0 Control Register 3^{(1, 2)}
b7 b6 b5 b4 b3 b2 b1 b0
000
Symbol
AD0CON3
Address
0395h
After Reset
XXXX X000b
Bit Symbol
Bit Name
Function
RW
DUS
DMAC operating mode
select bit
0: DMAC operating mode not used
1: DMAC operating mode used
RW
MSS
Multi-port sweep mode
select bit
0: Multi-port sweep mode not used
1: Multi-port sweep mode used⁽³⁾
RW
CKS2
Frequency select bit 2
(Note 4)
RW
MSF0
b4 b3
RO
0 0: AN_0 to AN_7
Multi-port sweep status flags⁽⁵⁾ 0 1: AN15_0 to AN15_7
MSF1
1 0:
1 1: ^{Do not set to these values.}
RO
−
(b7-b5)
Reserved bits
Set to 0.
Read as undefined value.
RW
NOTES:
1. If the AD0CON3 register is rewritten during A/D conversion, the conversion result will be incorrect.
2. The AD0CON3 register may return an incorrect value if read during A/D conversion. It must be read or written after the A/D
conversion stops.
3. When the MSS bit is set to 1;
-set the DUS bit to 1 and configure DMAC.
-set bits MD1 and MD0 in the AD0CON0 register to 10b or 11b.
-set bits SCAN1 and SCAN0 in the AD0CON1 register to 11b, the MD2 bit to 0, bits OPA1 and OPA0 to 00b.
-set bits APS1 and APS0 in the AD0CON2 register to 01b.
-set bits MPS11 and MPS10 to 01b.
4. Refer to the note for the CKS0 bit in the AD0CON0 register.
5. Bits MSF1 and MSF0 are enabled when the MSS bit is set to 1. When the MSS bit is set to 0, a read from these bits returns an
undefined value.
Figure 18.5 AD0CON3 Register
Rev.1.00 Jul 15, 2007 Page 257 of 352
REJ09B0385-0100