M32C8A Datasheet, PDF (121/372 Pages) Renesas Technology Corp – RENESAS MCU M16C FAMILY / M32C/80 Series

M32C/8A Group
11. Interrupts
Interrupt Control Register
b7 b6 b5 b4 b3 b2 b1 b0
Symbol
INT0IC to INT2IC
INT3IC to INT5IC⁽¹⁾
Address
009Eh, 007Eh, 009Ch
007Ch, 009Ah, 007Ah
After Reset
XX00 X000b
XX00 X000b
Bit Symbol
Bit Name
Function
RW
ILVL0
b2 b1 b0
0 0 0: Level 0 (interrupt disabled)
RW
0 0 1: Level 1
Interrupt priority level
0 1 0: Level 2
ILVL1
select bits
0 1 1: Level 3
RW
1 0 0: Level 4
1 0 1: Level 5
ILVL2
1 1 0: Level 6
1 1 1: Level 7
RW
IR
Interrupt request bit⁽²⁾
0: Interrupt not requested
1: Interrupt requested
RW
POL
Polarity switch bit⁽³⁾
0: Falling edge / "L" level selected
1: Rising edge / "H" level selected
RW
LVS
Level sensitive/
edge sensitive switch bit⁽⁴⁾
0 : Edge sensitive
1 : Level sensitive
RW
−
(b7-b6)
Unimplemented.
Write 0. Read as undefined value.
−
NOTES:
1. When a 16-bit data bus is used in microprocessor mode, pins INT3 to INT5 are used as data bus. In this case, set bits ILVL2 to
ILVL0 in registers INT3IC to INT5IC to 000b.
2. The IR bit can be set to 0 only. (Do not set to 1.)
3. Set the POL bit to 0 when its corresponding bit in the IFSR register is set to 1 (both edges).
4. When the LVS bit is set to 1, set its corresponding bit in the IFSR register to 0 (one edge).
Figure 11.5 Interrupt Control Register (2)
11.6.2.1 Bits ILVL2 to ILVL0
Bits ILVL2 to ILVL0 determine an interrupt priority level. The higher the interrupt priority level is, the higher
priority the interrupt has.
When an interrupt request is generated, its interrupt priority level is compared to IPL. This interrupt is enabled
only when its interrupt priority level is higher than IPL. When bits ILVL2 to ILVL0 are set to 000b (level 0),
the interrupt is disabled.
11.6.2.2 IR Bit
The IR bit is automatically set to 1 (interrupt requested) by hardware when an interrupt request is generated.
After an interrupt request is acknowledged and an interrupt sequence in the corresponding interrupt vector is
executed, the IR bit is automatically set to 0 (interrupt not requested) by hardware.
The IR bit can be set to 0 by program. Do not set it to 1.
Rev.1.00 Jul 15, 2007 Page 104 of 352
REJ09B0385-0100