M32C8A Datasheet, PDF(35/372 Page) Renesas Technology Corp – RENESAS MCU M16C FAMILY / M32C/80 Series

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M32C8A Datasheet, PDF (35/372 Pages) Renesas Technology Corp – RENESAS MCU M16C FAMILY / M32C/80 Series

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M32C/8A Group

2. Central Processing Unit (CPU)

2. Central Processing Unit (CPU)

Figure 2.1 shows the CPU registers.

The register bank is comprised of eight registers (R0, R1, R2, R3, A0, A1, SB, and FB) out of 28 CPU registers. There

are two sets of register banks.

b31

General registers

RR2 2

RR3 3

b23

b15

b0

RR0H0H

RR0L0L

RR1H1H

RR1L1L

RR2 2

RR3 3

AA0 0

AA1 1

SSBB

FBFB

Data registers(1)

Address registers(1)

Static base register(1)

Frame base register(1)

USP

ISP

INTB

PC

User stack pointer

Interrupt stack pointer

Interrupt table register

Program counter

b15

IPL

FLG

b8 b7

b0

U I OBSZDC

High-speed interrupt registers b23

DMAC-associated registers

b23

b15

b0

SVF

SVP

VCT

b7

b0

DMD0

b15

DMD1

DCT0

DCT1

DRC0

DRC1

DMA0

DMA1

DRA0

DRA1

DSA0

DSA1

Flag register

Carry flag

Debug flag

Zero flag

Sign flag

Register bank select flag

Overflow flag

Interrupt enable flag

Stack pointer select flag

Reserved

Processor interrupt priority level

Reserved

Flag save register

PC save register

Vector register

DMA mode registers

DMA transfer count registers

DMA transfer count reload registers

DMA memory address registers

DMA memory address reload registers

DMA SFR address registers

NOTE:

1. These registers comprise a register bank.

There are two sets of register banks (register bank 0 and register bank 1).

Figure 2.1 CPU Register

Rev.1.00 Jul 15, 2007 Page 18 of 352

REJ09B0385-0100

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