M32C8A Datasheet, PDF (91/372 Pages) Renesas Technology Corp – RENESAS MCU M16C FAMILY / M32C/80 Series

M32C/8A Group
9. Clock Generation Circuits
Oscillation Stop Detection Register⁽¹⁾
b7 b6 b5 b4 b3 b2 b1 b0
0000
Symbol
CM2
Address
000Dh
After Reset
00h
Bit Symbol
Bit Name
Function
RW
CM20
Oscillation stop detection
enable bit⁽²⁾
0: Oscillation stop detect function not used
1: Oscillation stop detect function used
RW
CM21
CPU clock select bit 2^{(3, 4)}
0: Clock selected by the CM17 bit
RW
1: On-chip oscillator clock
CM22
Oscillation stop detection flag⁽⁵⁾
0: Loss of main clock not detected
RW
1: Loss of main clock detected
CM23
Main clock monitor flag⁽⁶⁾
0: Main clock oscillates
RO
1: Main clock stops
−
(b7-b4)
Reserved bits
Set to 0
RW
NOTES:
1. Set the CM2 register after the PRC0 bit in the PRCR register is set to 1 (write enable).
2. If the PM21 bit in the PM2 register is set to 1 (disables a clock change), a write to the CM20 bit has no effect.
3. When a loss of the main clock is detected while the CM20 bit is set to 1, the CM21 bit becomes 1.
Although the main clock restarts oscillating, the CM21 bit does not become 0. To use the main clock as the CPU clock source
after the main clock restarts oscillating, set the CM21 bit to 0 by program.
4. When both the CM20 and CM22 bits are set to 1, do not set the CM21 bit to 0.
5. When a loss of the main clock is detected, the CM22 bit becomes 1. The CM22 bit can only be set to 0, not 1, by program.
If the CM22 bit is set to 0 by program while the main clock is stopped, the CM22 bit does not become 1 until another loss of the
main clock is detected after the main clock restarts oscillating.
6. Determine the main clock state by reading the CM23 bit several times after the oscillation stop detection interrupt is generated.
Figure 9.5 CM2 Register
Rev.1.00 Jul 15, 2007 Page 74 of 352
REJ09B0385-0100