M32C8A Datasheet, PDF (69/372 Pages) Renesas Technology Corp – RENESAS MCU M16C FAMILY / M32C/80 Series

M32C/8A Group
8. Bus
8.2 Bus Control
Described below are the signals required to access external devices. The signals are available in microprocessor
mode only.
8.2.1 Address Bus and Data Bus
Address bus is the signals to access 16-Mbyte space, and consists of 24 control pins; A0 to A22 and A23. A23
is an inverse output signal of the highest-order address bit.
Data bus is the signals for data input and output. The DS register selects either an 8-bit data bus width from D0
to D7 or a 16-bit data bus width from D0 to D15 for each external space. When a high-level (“H”) signal is
applied to the BYTE pin, the data bus accessing the external space 3 is 8 bits wide after reset.
When a low-level (“L”) signal is applied to the BYTE pin, the data bus accessing the external space 3 is 16 bits
wide.
8.2.2 Chip-Select Output
Chip-select outputs share pins with address bus, A20 to A22 and A23. Bits PM11 and PM10 in the PM1 register
determine the CS areas to be accessed and the number of chip-select outputs. Maximum of four chip-select
outputs are provided.
In microprocessor mode, no chip-select signal is output after reset. Only A23, however, can perform as a chip-
select output.
The CSi pin (i=0 to 3) outputs an “L” signal while accessing its corresponding external space. An “H” signal is
output while the MCU is accessing other external spaces. Figure 8.2 shows an example of address bus and
chip-select outputs (separate bus).
Rev.1.00 Jul 15, 2007 Page 52 of 352
REJ09B0385-0100